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8 Mbit (x16) Multi-Purpose Flash Plus
A Microchip Technology Company
SST39VF801C / SST39VF802C / SST39LF801C / SST39LF802C
Data Sheet
ADDRESS A MS-0
CE#
OE#
T RC
T CE
T OE
T AA
WE#
V IH
T OLZ
T OHZ
DQ 15-0
HIGH-Z
T CLZ
T OH
DATA VALID
T CHZ
DATA VALID
HIGH-Z
1434 F03.0
Note: A MS = Most significant address
A MS = A 18
Figure 6: Read Cycle Timing Diagram
T BP
ADDRESSES
555
2AA
555
ADDR
T AH
T WP
WE#
T AS
T WPH
OE#
T CH
CE#
RY/BY#
T CS
T DS
T BY
T DH
T B R
DQ 15-0
XXAA
XX55
XXA0
DATA
VALID
WORD
(ADDR/DATA)
Note: WP# must be held in proper logic state (V IL
or V IH ) 1μs prior to and 1μs after the command sequence.
X can be V IL or V IH , but no other value.
Figure 7: WE# Controlled Program Cycle Timing Diagram
1434 F25.0
?2011 Silicon Storage Technology, Inc.
20
DS25041A
05/11
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